Microelectronics and Integrated-Computing-Systems with Nanoelectronic Devices (MIND) Lab
Project 1: Advanced Semiconductor Logic and Memory Devices:
: Moore’s law of CMOS transistor scaling has been the backbone of microelectronics and digital computing revolution so far1. However, transistor gate lengths have already reached to around 2 nm (i.e. Angstrom Era) and it is increasingly difficult to scale down the size of transistors due to limitations imposed by the device physics2. On the other hand, computing and data storage needs have increased drastically. It is well-recognized that novel device technologies for logic computing and data storage is necessary to address the demands of future computing. Students working on this project will work on advanced logic and memory device technology with a blend of both hands-on research in CEAS Cleanroom and MIND lab, and modeling. Ideal candidate will be EE student with interest in pursuing career in Semiconductor fabrication industry such as Intel or research in this area.
Project 2: Neuromorphic Computing Architecture with Emerging Neuronal and Synaptic Memory Devices
This project will involve Device Technology Co-optimization (DTCO) and System Technology Co-optimization (STCO) approaches for low-power computing architectures to enable Edge AI3. Students will research on various neuromorphic computing architectures and how they compare to the cortical circuitries in brain and designing brain-inspired architectures for cognitive data analytics in edge applications, such as sensors and transceivers. Ideal candidate will be CPE student with interest in pursuing career in Semiconductors and other Fabless Microelectronics design companies such as Intel, Google, Qualcomm, Nvidia.
References:
1. https://www.intel.com/content/www/us/en/silicon-innovations/moores-law-technology.html
2. K. J. Kuhn, "Moore's Law Past 32nm: Future Challenges in Device Scaling," 2009 13th International Workshop on Computational Electronics, 2009, pp. 1-6, doi: 10.1109/IWCE.2009.5091124.
3. A. Mallik et al., "Design-technology co-optimization for OxRRAM-based synaptic processing unit," 2017 Symposium on VLSI Technology, 2017, pp. T178-T179, doi: 10.23919/VLSIT.2017.7998166.
About the MIND Lab
MIND lab (located in Rhodes Hall 937) is engaged in interdisciplinary research in the areas of advanced semiconductor logic and memory device design, fabrication, testing, and modeling. Our research also involves developing novel computing circuitries and architectures, such as brain-inspired computing architectures, hardware accelerator for AI, neuromorphic architectures and synaptic memory devices, and cross-technology heterogenous/monolithic integration. We also explore approaches for developing secure microelectronics hardware and assurance techniques by integrating novel device technologies in CMOS Platforms. MIND lab has graduated many PhD, MS, and UG students in research who are now placed in reputed companies such as Intel, Micron, Apple, Google, Microsoft, and Riverside Research. Students performing research in MIND lab have published their work in highly reputed journals, attended conferences, and filed/granted patents. Additionally, two Protégé students from MIND lab have been the recipients of second place in past Protégé research symposiums.
Director
Rashmi Jha
Professor, CEAS - Electrical and Computer Engineeri
385 MANTEI